Firmware Release Notes

Firmware release notes for the Binho Supernova and the Binho Pulsar, newest first. They share one firmware line, so one set of notes covers both. The Atira and the Nova are listed under Other products. To install a version, see Updating Firmware.

Version	Date	Summary	Use with
4.6.2	Released	Target-voltage safety, I2C clock and recovery, SPI and I3C fixes	CosmicSDK / PyCosmicSDK 1.7.1
4.6.1	2026-09-30	HDR-DDR fix	CosmicSDK / PyCosmicSDK 1.6.0
4.6.0	2026-09-29	I2C duty cycle, SMBus clock stretching, SPI clock change	CosmicSDK / PyCosmicSDK 1.6.0
4.5.1	2026-09-24	SPI and I2C fixes	CosmicSDK / PyCosmicSDK 1.5.1
4.5.0	2026-09-16	Transfers up to 32 KB, I2C and SPI target mode	CosmicSDK / PyCosmicSDK 1.5.1

Note

Every version on this page needs the Airlock bootloader. An adapter on firmware 4.2.x or earlier needs the one-time bootloader migration first. Updating from 4.3.0 or later needs no migration.

4.6.2

Works with CosmicSDK 1.7.1 and PyCosmicSDK 1.7.1.

Behaviour changes

Caution

Setting a target voltage (VTARG) on a port that is already powered from outside is now refused. If the port reads above 500 mV before the adapter switches on its own supply, the supply stays off and the command returns FW_EXTERNAL_VOLTAGE_DETECTED (0x0102). A refused setting is not saved. Before, the adapter connected its supply on top of the external one. If the target powers itself, use the SDK’s use external voltage call instead of setting a voltage. This covers the shared I2C/SPI/UART/GPIO rail on both adapters and the I3C LV and HV ports on the Supernova.

Caution

I2C frequencies now round down, never up, and out-of-range values are refused. Without a duty cycle set, a request runs at or below the value requested: 550 kHz runs at 500 kHz, 700 kHz at 600 kHz, 858 kHz and 900 kHz at 800 kHz. 100 kHz, 400 kHz and 1 MHz are unchanged. A request below 11 Hz or above 3 MHz (including 3.4 MHz) returns INVALID_PARAMETER and the bus keeps its current rate. Before, 858 kHz ran at about 273 kHz and an out-of-range request ran the bus at about 11 Hz, both reported as success. For an exact clock, set a duty cycle (firmware 4.6.0 and later).

Fixes

• Target voltage after a reset. A saved target voltage is now applied when the adapter restarts after a reset or a firmware update. Before, if the rail had been set to another value after saving (for example 0 V), a rail saved at 1.8 V could start at about 3.3 V. Unplugging USB was not affected.
• I2C no longer resets the adapter on a stuck bus. When a target holds the bus, an I2C transfer or scan now ends with a timeout (about 1.5 s) instead of the adapter restarting about 8 s later.
• I2C bus recovery after a failed scan. A scan that fails at bus level now resets the controller and clocks up to 9 pulses on SCL to free a target holding SDA. The next transfer works without a reset.
• I2C STOP timing after a NACK. With the adapter’s pull-ups disabled, the STOP after a NACK now meets the I2C setup time (measured 5.3 µs; it was under 0.1 µs).
• 10-bit I2C scan. Scanning with 10-bit addresses no longer leaves the adapter unresponsive.
• SPI after a timeout. After an SPI transfer timed out, every later transfer came back one byte late until a restart. The controller is now reset after a timeout.
• Zero-length SPI transfer. Now returns INVALID_PARAMETER. It returned FW_UNHANDLED_ERROR (0x000C).
• I2C target mode after large transfers. Starting I2C target mode after a large (bulk) SPI transfer no longer times out.
• Concurrent traffic with clock stretching. Commands sent while a long I2C clock stretch is in progress are no longer lost.
• I2C pull-ups with the rail off. With the target voltage at 0 V, the adapter’s I2C pull-ups are now disconnected, so they no longer power an unpowered target through SDA and SCL. They come back when the rail returns.
• I3C target table. Repeating RSTDAA followed by ENTDAA, SETDASA or SETAASA no longer adds a new table entry each cycle. Before, the table filled after about ten cycles and further address assignment failed.
• I3C external voltage check. Using an external supply on the I3C HV port now checks the HV voltage itself.
• Bootloader version query. Asking for the bootloader version now returns an empty string instead of unreadable bytes, and no longer resets the adapter.

4.6.1

Released 2026-09-30. For I3C HDR-DDR, use 4.6.1 instead of 4.6.0. Works with CosmicSDK 1.6.0 and PyCosmicSDK 1.6.0; no host change.

Fixes

• HDR-DDR. A standard (SDR) command sent after an HDR-DDR read could time out after 1 s, and every I3C command after it then failed with I3C_ENGINE_BUSY until a reset. On 4.6.0 this happened in about 90 % of DDR read → GETPID cycles. Measured on 4.6.1: 0 timeouts in 6000 cycles.

Known limitations

• An IBI that arrives on the same clock as the start of a controller command is dropped, and that command times out. Seen once in 3000 cycles.
• Without a duty cycle set, some I2C frequencies round up: 550 kHz runs at 600 kHz. Setting any duty cycle gives the exact clock. Fixed in 4.6.2.
• An I2C frequency above 3 MHz (including 3.4 MHz) or below 11 Hz is accepted and reported as success, but the bus runs at about 11 Hz. On 4.5.0 and earlier the adapter could re-enumerate instead. Initialize I2C between 11 Hz and 3 MHz. Fixed in 4.6.2: the request returns INVALID_PARAMETER.
• SPI reads above about 20 MHz on a Supernova, or 25–50 MHz on a Pulsar (depends on wiring and the connected part), can come back shifted by one bit while reporting success. Writes are not affected. Keep reads that carry data at a lower clock, and put a time limit on flash busy (WIP) polling.
• A zero-length SPI transfer returns FW_UNHANDLED_ERROR (0x000C). Fixed in 4.6.2.
• In CAN-FD mode (Pulsar), large (bulk) transfers are not available. Normal I2C, SPI, UART and GPIO commands keep working.
• After large (bulk) transfers, starting I2C target mode can time out until the adapter is reset. Reset the adapter before starting target mode. Fixed in 4.6.2.
• SPI target mode can skip the first byte sent in the first transaction after a role change. Later transactions are correct.

4.6.0

Released 2026-09-29. Works with CosmicSDK 1.6.0 and PyCosmicSDK 1.6.0. Hosts that do not use the new features need no change. For HDR-DDR, install 4.6.1 instead.

Highlights

• I2C SCL duty cycle and exact frequency. Set the share of each SCL period held high, from 20 % to 80 % in 10 % steps. With a duty cycle set, the bus runs at an exact clock at or below the request, at most 0.29 % under between 1 kHz and 1.2 MHz (550 kHz runs at 549.8 kHz). The reply reports the frequency and duty cycle in effect.
• Clock stretching for I2C devices on the I3C port (Supernova). For SMBus and MCTP devices that stretch the clock. Runs at 10 kHz to 1 MHz with the SMBus 35 ms timeout; the actual rate depends on pull-ups and bus capacitance and is reported back. While it is on, I3C commands return I3C_I2C_CLOCK_STRETCHING_ACTIVE.
• SMBus reset and SDA pull-up on the I3C port (Supernova). Hold SCL low for 1 µs to 1 s (the SMBus/NVMe-MI reset), and set the SDA pull-up to AUTO (default), OFF or ON.

Behaviour changes

Caution

The SPI clock never runs above the requested frequency. Requests now round down to the next clock the adapter can make: 29 MHz runs at 25 MHz on both adapters. Before, 29 MHz ran at 33.3 MHz on a Pulsar. A request below the slowest clock (about 1.53 kHz on the Pulsar, 2.29 kHz on the Supernova) returns INVALID_PARAMETER and the bus keeps its clock.

• I2C transfers to an I3C dynamic address are refused. A legacy I2C transfer to the dynamic address of an I3C target now returns INVALID_PARAMETER. Before, it knocked that target off the bus until it was power-cycled.

Fixes

• Pins stop driving when the target voltage is off. With the I2C/SPI/UART/GPIO rail set to 0 V, SPI, UART and GPIO pins no longer drive an unpowered target. They resume, with the settings, when the rail comes back.
• Supernova I3C HV voltage accuracy. The I3C HV rail now lands within −7 to +2 mV of the request across 1200–3250 mV (1200 mV used to read 1075–1094 mV). Setting it takes about 550 ms.

4.5.1

Released 2026-09-24. A fix release on top of 4.5.0; no host change.

Fixes

• SPI transfer length. A standard SPI transfer longer than 1024 bytes is refused again, as in 4.4.0. Use the bulk transfer for larger payloads.
• I2C after arbitration lost. After an arbitration-lost error the next I2C command went unanswered, and the adapter restarted about 8 s later. The controller now recovers.

Known limitations

• With the target voltage set to 0 V, GPIO outputs and SPI chip selects keep driving. Set outputs back to inputs before switching the rail off. Fixed in 4.6.0.
• A legacy I2C transfer to an enumerated I3C target’s dynamic address knocks that target off the bus until it is power-cycled. Fixed in 4.6.0 (the transfer is refused).
• A standard (SDR) command sent after an HDR-DDR read can time out after 1 s, and every I3C command after it then fails with I3C_ENGINE_BUSY until a reset. Rare on 4.5.1: about 2 in 300 DDR read → GETPID cycles. Fixed in 4.6.1.

4.5.0

Released 2026-09-16.

Highlights

• Transfers up to 32 KB. I2C and SPI transfers can carry up to 32,768 bytes on the Supernova and 16,384 on the Pulsar, and I3C up to 32,767 bytes per frame on the Supernova, using the adapter’s USB bulk endpoints. The SDK picks this path automatically.
• I2C and SPI target mode. The adapter can act as a device on the bus:
  • I2C target: memory, EEPROM (page writes, write cycle, write protect) or register map.
  • SPI target: memory, 25-series flash (RDID, READ, FAST_READ, PAGE_PROGRAM, status, write enable) or register map.
• Release an interface. I2C and SPI can be released during a session, to switch between controller and target mode without a power cycle.

Behaviour changes

Caution

A short I3C read now reports an error. If a target returns fewer bytes than requested, the read returns I3C_TRANSFER_INCOMPLETE_READ (0x061A) with the bytes that did arrive. Before, it returned success with a short buffer. This includes HDR-DDR reads from a target that does not support DDR, which now fail every time. CosmicSDK 1.5.0 and later name this code.

Fixes

• The adapter no longer stops answering all commands after SPI activity.
• An SPI transfer that runs over its time budget is answered only after it has stopped.
• Unknown commands return FW_UNSUPPORTED_COMMAND instead of stopping that interface.

Known limitations

• I3C transfers are limited to 32,767 bytes per frame, counting the register address. A 32,768-byte I3C frame reports success but drops the last byte, and the next I3C transfers fail until the controller is re-initialized. This limit applies to every later version too.

4.4.0 and Earlier

For notes on firmware 4.4.0 and earlier, contact support. Firmware 4.3.0 is the first version that uses the Airlock bootloader.

Other products

Product	Firmware	Notes
Binho Atira	1.0 and later	Firmware 1.0 is the minimum the SDKs accept. Mission Control 3 device packs need 1.1 or later. Detailed release notes are not published yet.
Binho Nova	See the Latest Firmware table	Release notes are not published for the Nova.