# SPI

SPI, short for *Serial Peripheral Interface*, is a widely-used communication protocol in the realm of electronics. Binho Mission Control optimizes the user's interaction with the SPI protocol, presenting an intuitive approach to its functionalities. When the SPI communication protocol is selected and activated, the Command Panel gets segmented into three distinct sections, each dedicated to a specific facet of the SPI communication: settings, chip selection, and transaction execution.

<figure><img src="/files/YNGMAv3RTFZSSgVugw0J" alt="" width="563"><figcaption><p>SPI command panel for Supernova and Pulsar</p></figcaption></figure>

The Bus Voltage section allows the user to initialize and set the bus voltage. Additionally, in the case of Supernova and Pulsar, users can measure the bus voltage and choose to use an external power source. Using an external source is equivalent to measuring the voltage and setting it to match the external supply.

## Settings

<figure><img src="/files/rTvr49vxawwDt7sX6IlV" alt=""><figcaption><p>Operation Settings for Nova</p></figcaption></figure>

The Settings segment allows users to adjust the following parameters:

<table><thead><tr><th width="156">Parameter</th><th width="142">Nova values</th><th width="248">Supernova and Pulsar values</th><th>Comment</th></tr></thead><tbody><tr><td><strong>Clock Freq</strong> </td><td>0.8 to 12 MHz</td><td>10 kHz to 50 MHz</td><td>Discreet values.</td></tr><tr><td><strong>Bit Order</strong></td><td>MSB, LSB.</td><td>MSB, LSB.</td><td>Most/Less Significant Bit first.</td></tr><tr><td><strong>Bits / Transfer</strong></td><td>8, 16.</td><td>-</td><td>Bits per transfer.</td></tr><tr><td><strong>Mode</strong></td><td>0, 1, 2, 4.</td><td>0, 1, 2, 4.</td><td>(CPOL, CPHA) ∈ {(0,0); (0,1); (1,0); (1,1)}</td></tr></tbody></table>

CPOL and CPHA refer to the clock's polarity and phase. In tandem, they designate the precise timing and edge (be it rising or falling) at which data is sampled.

## Chip Selection

<figure><img src="/files/N5FHZvTZvjUkLTAEmbE0" alt=""><figcaption><p>Chip Select for Nova</p></figcaption></figure>

<table><thead><tr><th width="207">Parameter</th><th width="177">Admited values</th><th>Comment</th></tr></thead><tbody><tr><td>Pin Select</td><td>CS0, CS1.</td><td>CS = Chip Select</td></tr><tr><td>Polarity</td><td>Low, High.</td><td>Active Low/High polarity for CS.</td></tr><tr><td>Pre-Delay</td><td><em>Numeric</em></td><td>Only positive integer numbers. Unit: μs.</td></tr><tr><td>Post-Delay</td><td><em>Numeric</em></td><td>Only positive integer numbers. Unit: μs.</td></tr></tbody></table>

Pre/Post Delays pertain to the time gap between the inactive-to-active transition of the CS (Chip Select) signal and the sampling of the initial payload bit.

## Transactions

<figure><img src="/files/qt7unbYLYy24Ui98EZKP" alt="" width="563"><figcaption><p>Transactions sub-panel.</p></figcaption></figure>

This segment comprises two text fields and a dedicated TRANSFER button, simplifying SPI transaction processes.

1. **Write Buffer**: Here, users input the data payload designated for the target device. It's important to note that entries should be in hexadecimal form, grouped in byte packets. For instance, inputs like '00' or 'FF' (contingent on the chosen polarity) symbolize a read-only operation.
2. **Read Size**: This field allows users to determine the quantity of bytes they wish to retrieve from the target device. Initiating an SPI transaction is as simple as hitting the TRANSFER button.

## Real-world Examples

Outlined below are hands-on tests with tangible devices, offering a glimpse into the SPI protocol in action.

**Flash Memory Test with W25Q128fV**: Utilizing a Winbond flash memory model W25Q128fV, we explored the Binho Mission Control app's SPI capabilities. The device's datasheet elucidates an instruction to fetch the JEDEC designated manufacturer ID, Memory Type, and its Capacity concurrently. This is executed by transmitting the byte '0x9F' to the flash memory input. Winbond's ID, as per the datasheet, is '0xEF'. With a permissible clock frequency of up to 50 MHz and compatibility with SPI modes 0 and 2, our test was conducted at a 12 MHz clock frequency in mode 0. The subsequent results, especially concerning the JEDEC ID, aligned with our expectations.

<figure><img src="/files/7ry8s9gMq9G8psTtzBhu" alt=""><figcaption><p>Write operation to a SPI flash memory</p></figcaption></figure>

**Pressure Sensor Test with BMP280**: This example delves deeper, showcasing the capabilities of the SPI protocol using the BMP280 pressure sensor.

<figure><img src="/files/hWofUUoa1muPUiEHR6Cn" alt=""><figcaption></figcaption></figure>


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